晉升主管職工作推薦

  • Network On Chip Modeling Engineer 面試心得

  • 企業名 聯發科技股份有限公司
  • 工作地點 新竹市東區
  • 薪資 面議（經常性薪資達4萬元或以上）0~0元
  • 工作內容 Challenge is the essences of opportunity. Challenge breakthrough creates innovations. In here, you are encouraged to embrace challenge, bring your ideas into product, create the vision into reality. You will need to design and evaluate next-generation NOC architecture, fulfilling cutting-edge product features and demands, meeting the performance/power/cost/schedule target, with the passion of coordination among matrix management teams.
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    • 聯發科技股份有限公司-使用1111轉職專區 https://central1111.com.tw/turn/
應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

  • SoC Infrastructure architect 面試心得

  • 企業名 聯發科技股份有限公司
  • 工作地點 新竹市東區
  • 薪資 面議（經常性薪資達4萬元或以上）0~0元
  • 工作內容 In this role, you will be a member of the System-on-Chip (SoC) Infrastructure team, responsible for Architecture and design for high-performance, low-power on chip interconnect and fabric components. Analyze the interconnect fabric at SOC level and sub-subsystem level and configure fabric components to meet bandwidth, latency, power needs of SOC. Work with cross function teams (architect, hardware, software, verification…) to develop system models and IPs for different architectural options for power, performance and cost trade offs.
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    • 聯發科技股份有限公司-使用1111轉職專區 https://central1111.com.tw/turn/
應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

  • System-Level-Cache design architect 面試心得

  • 企業名 聯發科技股份有限公司
  • 工作地點 新竹市東區
  • 薪資 面議（經常性薪資達4萬元或以上）0~0元
  • 工作內容 In this role, you will be a member of the System-Level-Cache (SLC) design team, working with architecture, modeling, silicon, software and other design teams to develop competitive SLC design. We are looking for highly motivated, hands-on individuals who are passionate about memory performance improvement to benefit memory access behavior in sophisticated system. Major Responsibilities: •Co-work with system architect to develop competitive memory system architecture • Analyze/improve memory system performance including latency and efficiency • Responsible for micro architecture planning and RTL design coding •Integrate IP into project and meet schedule and P.P.A. requirement •Co-work with DV team to well verify RTL design •Support software team to resolve memory system related issue
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    • 聯發科技股份有限公司-使用1111轉職專區 https://central1111.com.tw/turn/
應徵
工作適配度－%

登入 後即可查看

根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

  • Chiplet Architect 面試心得

  • 企業名 聯發科技股份有限公司
  • 工作地點 新竹市東區
  • 薪資 面議（經常性薪資達4萬元或以上）0~0元
  • 工作內容 In this role, you will be responsible to develop new hardware/chip architectures, technologies, designs and methodologies for Mediatek’s silicon solution to address advanced chiplet architectures in 2D, 2.5D and 3D configurations. Mediatek provides the challenging and exciting technical position where you will have the opportunities to explore and define the next generation silicon solutions. Major Responsibilities: • Develop new product and chip architectures, analyze the key metrics such as power, performance, area, scalability and reusability for chiplet • Develop new methodologies for chiplet design and mass production flow
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    • 聯發科技股份有限公司-使用1111轉職專區 https://central1111.com.tw/turn/
應徵
工作適配度－%

登入 後即可查看

根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

應徵
工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

4/24

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