新竹市轉職工作機會，轉職跳槽推薦工作，提供履歷健診等強化服務|1111轉職專區-第674頁

A10 RD Engineer (Coding) 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=328&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: 1. Develop AI rule generator and QC pattern generator for complex design rule. 2. Automation for Design Rule Quality Check flow by python. 3. Automation for Design Rule Quality Check flow by excel VBA. 4. Advance technology and design co-optimization for manufacturing & PPAC.

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工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

A10 RD Device Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=302&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: 1. 10 Å CMOS platform technology development. 2. With focus on transistor characterization, design, targeting, and performance step-up. 3. Lot handling & on-duty (night shift and weekend) rotation.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

Machine Learning SW Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=306&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. GPU computation for mask defect detection. 2. Transformer/style transfer to simulate tool’s inspection images for inline defect check. 3. CNN for auto defect classification.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

Layout Designer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=399&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1.Support Layout production and quality verification for advanced node 2.Advanced node path finding for best speed, power and area by using layout technique. 3.Methodology development for layout optimization, productivity and quality enhancement. 4.Machine Learning/AI exploratory for layout quality and productivity enhancement.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

IT Software Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址:https://careers.tsmc.com/careers/JobDetail?jobId=461&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Role: Building world-class cloud native infrastructure and ramping to high-volume production is key to enabling TSMC to scale worldwide. We are looking for a highly motivated engineer to join our global systems development team to support TSMC fabrication worldwide. The ideal candidate is highly technical with multi-discipline engineering skillset, that can push the limits of complex system design at large scale. Responsibility: 1. Develop state-of-the-art applications 2. Continue to refactor existing applications 3. Write and pass various kinds of tests (unit/feature/integration) to ensure software quality 4. Apply software design principles, such as 12-factor app, to ensure software quality 5. Ensure sustainability and performance of applications by working with SRE to define SLI/SLO and providing metrics for monitoring/alerting 6. Collaborate with peers in design, pair programming and code reviews 7. Willing to learn new IT technology

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

Digital Design and Automation Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=532&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: Front-end to back-end large scale digital circuit design for system-on-chips and 3DICs, responsible for designing with the state-of-the-art process technologies and developing corresponding CAD flows that explores cutting edge design methodologies and latest EDA tools, either for internal first-in-the-industry testchips or leading customer’s products

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

Backend Software Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=541&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. The Role: Software Engineer, Backend Development at TSMC IT focus on designing the most flexible, scalable backend architecture with optimized performance to support TSMC world-class manufacture, engineering and business systems. The ideal candidate has a highly technical multi-discipline engineering skillset that can push the limits of complex system design at large scale. Responsibilities: 1.Implement the features and services of backend for TSMC software products 2.Develop state-of-the-art code 3.Continue to refactor existing applications 4.Contribute to write tests to ensure software quality 5.Apply software design principles to ensure software quality 6.Ensure sustainability and performance of software applications 7.Willing to learn new IT technologies

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

APR Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=545&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1.Hands on SOC chip/ block implementation from gate level netlist to GDS tape-out. 2.Develop IC design methodology 3.Chip tape-out; Design methodology development

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

A10/A14 RD Integration Engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: 1. Development of world-class cutting-edge technology, and responsible for the success of the A10/A14 technology: (1) Process integration across process modules, including test key design, tape out, device analysis, simulation, model, and robust. (2) Test key designs for design rule validation, electrical modeling, and yield learning. (3) Characterization of state-of-the-art devices, spice targets‘ setting for modelling, occasional bench measurement. (4) Lot handling: periodically serves as on-duty engineer to coordinate device lots‘ handling. 2. Advanced process integration development: integration and baseline sustaining to meet process KPIs on performance/ yield/ reliability/ manufacturability in A10/A14 program. 3. Advanced integration baseline process transfer to volume production. 4. Data analysis to identify the issue and issue owner. 5. Co-work with various teams to evaluate new processes and solve the issue. 6. Routine integration logistic job.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

3DIC flow engineer 面試心得
企業名台灣積體電路製造股份有限公司(台積電)
工作地點新竹市新竹市
薪資面議（經常性薪資達4萬元或以上）40000~0元
工作內容【本職缺僅接受台積電官方網站投遞】請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=451&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Advanced 2.5D and 3D packaging technology development. 2. Design flows, including APR, EM/IR, Thermal, and SI/PI, enablement. 3. Design kits generation and QA. 4. 3DIC solution adoption support with key customers.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

8/5

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