台灣月薪轉職工作機會，轉職跳槽推薦工作，提供履歷健診等強化服務|1111轉職專區-第13476頁

＜Data center＞數位IC設計工程師_台北 (SOC BE) 面試心得
企業名聯發科技股份有限公司
工作地點台北市內湖區
薪資面議（經常性薪資達4萬元或以上）0~0元
工作內容 1. 優化數位 IC 設計 BE 流程與方法 2. 執行與管理數位 IC 設計 BE 相關任務 (2.a) Physical aware synthesis, DFT-SCAN, DFT-MBIST insertion (2.b) STA timing analysis 與 fixing (2.c) Netlist level QC，例如 CLP 3. 與 FE RTL designer 及 PD APR 團隊密切合作，針對 PPA（Performance, Power, Area）進行 design 及 clock structure 的優化 4. 將依應徵者的年資與專業經驗，提供不同的職級

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應徵

工作適配度－%

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3/20

＜Data center＞資深數位設計及IP整合工程師面試心得
企業名聯發科技股份有限公司
工作地點新竹市東區
薪資面議（經常性薪資達4萬元或以上）0~0元
工作內容 1. Own the top-level integration of internal and third-party IPs into SOC or FPGA platform. 2. Ensure interface compatibility, clock/reset domain correctness. Resolve integration issues including timing, CDC/RDC, and floorplan. 3. Work closely with architect to define specification, support physical design team through synthesis constraints and integration guidance, partner with firmware and validation teams to ensure smooth bring-up and validation.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞資深數位設計工程師 - Ethernet PCS/FEC/MAC 面試心得
企業名聯發科技股份有限公司
工作地點新竹市東區
薪資面議（經常性薪資達4萬元或以上）0~0元
工作內容 1. 數位 IC 設計 2. 高速 Ethernet PCS/RSFEC/MAC 設計 3. 高速電路架構與整合

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞資深數位設計工程師 - Ethernet MAC 面試心得
企業名聯發科技股份有限公司
工作地點新竹市東區
薪資面議（經常性薪資達4萬元或以上）0~0元
工作內容 1. Develop Ethernet MAC for HPC networking applications. 2. Work closely with architecture, verification and physical teams from specification to implementation.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

能量小姐健康餐-永和門市-正職人員
企業名能量小姐健康餐飲有限公司
工作地點新北市永和區
薪資月薪34000元以上
工作內容 1.客用區的環境清潔及佈置 2.清洗、準備餐點所需要的食材 3.烹煮食材 4.協助出餐並提供有關用餐的服務 5.工作區域及設備的清潔維護 6.櫃台點餐 7.外送

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞資深D2D高速介面設計工程師面試心得
企業名聯發科技股份有限公司
工作地點台北市內湖區
薪資月薪34000元以上
工作內容 1. Develop Die-to-die and UCIe digital IP for HPC SOC. 2. Integration of D2D controller and PHY to timing closure and DFT. 3. Define interface specifications, creating comprehensive verification plans, and support integration and physical implementation. 4. Work closely with multiple teams such as mixed mode designers and Firmware engineers.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

O卡桑_門市營運培訓專員
企業名Ｏ卡桑_日進生技股份有限公司
工作地點台北市大同區
薪資月薪34000元以上
工作內容

應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞資深D2D架構設計師面試心得
企業名聯發科技股份有限公司
工作地點台北市內湖區
薪資月薪34000元以上
工作內容 1. Researching and crafting architecture solutions for die-to-die and chip-to-chip communication, optimizing for performance, area, power, security, and resiliency 2. Working with other design teams to define interfaces and flows between D2D blocks and the rest of the chip 3. Architectural modeling, validation, definition and documentation 4. Driving implementation across design, verification, firmware and software teams

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞通訊系統演算法開發資深工程師/技術副理面試心得
企業名聯發科技股份有限公司
工作地點新竹市東區
薪資月薪34000元以上
工作內容【About the Role】 Join our cutting-edge team to shape the future of communication technologies. As a key member of our engineering team, you will be at the forefront of developing innovative baseband algorithms, designing robust Ethernet or PCIe/USB4 PHY systems. Your expertise will drive the creation of low-power, high-speed communication systems and advance the digital signal processing of mixed-signal systems. Additionally, you will play a pivotal role in representing our company at IEEE/OIF standard meetings, influencing the future of communication standards. With the rapid advancement of Generative AI, the demand for high-speed Serializer/Deserializer (SerDes) in data center applications is skyrocketing. This trend presents significant business opportunities, and you will be instrumental in capitalizing on these developments. 【Key Responsibilities】 1. Develop state-of-the-art baseband algorithms to enhance communication system performance. 2. Architect and design Ethernet or PCIe/USB4 PHY systems, focusing on system efficiency and reliability. 3. Lead communication system verification efforts to ensure system integrity and performance. 4. Innovate in architecture and algorithm design for low-power, high-speed communication systems. 5. Apply digital signal processing techniques to optimize mixed-signal system functionality. 6. Actively participate in IEEE/OIF standard meetings, contributing to the development of industry standards. 7. Leverage the trend of Generative AI to drive the development of high-speed SerDes solutions for data center applications.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

＜Data center＞混合信號數位IC設計工程師(Serdes, 高速介面) 面試心得
企業名聯發科技股份有限公司
工作地點新竹市東區
薪資月薪34000元以上
工作內容 1. Serdes/High speed interface related PHYD IP architecture planning. 2. Serdes/High speed interface related PHYD IP RTL coding. 3. Serdes/High speed interface related PHYD IP front-end and back-end integration. 4. Co-work with MAC design team and DV team for IP verification. 5. Co-work with Analog design team for PHY co-simulation.

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應徵

工作適配度－%

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根據履歷表的填寫狀況，智慧分析您與工作的適配程度。

3/20

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