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3DIC DFT/Test Architecture Lead/Manager
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企業名
新加坡商芯夥科技股份有限公司台灣分公司
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工作地點
新竹縣竹北市
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薪資
月薪38000~50000元
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工作內容
• Define comprehensive DFT/test architecture for 3DIC and chiplet-based products, including pre-bond, mid-bond, post-bond, final test, and system-level test considerations.
• Develop test strategy for logic, memory, interconnect, TSV/micro-bump connectivity, repair, redundancy, and yield monitoring.
• Work with architecture, design, package, product engineering, reliability, and operations teams to ensure testability is built in from the beginning.
• Drive implementation planning for scan, MBIST, LBIST, boundary test, interconnect test, and diagnosis flows as applicable.
• Evaluate tradeoffs among coverage, test time, test cost, quality, and production scalability.
• Support ATE strategy, test access mechanisms, known-good-die methodology, and failure diagnosis for stacked or chiplet products.
• Establish DFT guidelines, test insertion requirements, and quality metrics for future 3DIC platforms.
• Lead bring-up and silicon learning feedback loop to improve yield and test effectiveness.
新加坡商芯夥科技股份有限公司台灣分公司-使用1111轉職專區
https://central1111.com.tw/turn/